Setup & Hold Time Margin
Enter your timing numbers to compute setup/hold margins instantly. Includes optional uncertainty budgeting and Show Work.
How to Use
- Pick a timing model (common FF→FF defaults are included).
- Enter clock period, clock-to-Q, combinational delay (min/max), setup and hold requirements.
- Optionally include uncertainty (skew + jitter + margin).
- Review setup/hold margins and the worst-case margin; open Show Work for formulas.
Timing Window View
Visual overview of launch → capture with margins.
Setup Margin
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Hold Margin
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Worst Margin
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Status
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Result:
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Show Work (step-by-step)
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Work is shown in base units for consistency. Setup uses max path; hold uses min path.
Reference
Common FF→FF single-cycle checks (simplified):
- Setup:
Tclk + Tskew − Tjitter ≥ Tcq(max) + Tcomb(max) + Tsetup - Hold:
Tcq(min) + Tcomb(min) − Tskew − Tjitter ≥ Thold
Positive skew (capture later than launch) generally improves setup and worsens hold.
FAQ
What does a negative margin mean?
It indicates a timing violation: your path cannot meet setup or hold under the given assumptions.
Why do we use max for setup and min for hold?
Setup is worst when signals arrive late; hold is worst when they arrive early.
What should I put for jitter/uncertainty?
Use a conservative total uncertainty number from your clock source/PLL plus any additional analysis margin your flow requires.
Tool Info
Last updated:
Updates may include additional timing models, constraint presets, and edge-case handling.